This application claims the benefit of Korean Application No. 2001-74375, filed Nov. 27, 2001 in the Korean Industrial Property Office, the disclosure of which is incorporated herein by reference.
1. Field of the Invention
The present invention relates to a poly-silicon layer and a device having the same, and more particularly, to a poly-silicon layer of a thin film transistor (TFT) and a device having the same.
2. Description of Related Art
An active channel region of a thin film transistor (TFT) is generally made of a poly-silicon material and so includes grain boundaries. In the grain boundaries, defects such as dangling bonds and strained bonds exist, and such defects act as traps of the charge carriers.
Therefore, parameters such as grain size, grain-size uniformity, number of grains, locations of grain boundaries, and tilt angle of grain boundaries affect characteristics of the TFT such as threshold voltage, sub-threshold slope, charge carrier mobility, leakage current, and device stability. In particular, the tilt angle of the grain boundaries affects uniformity in characteristics of the TFTs.
The grain boundary which adversely affects characteristics of the TFT is referred to as a primary boundary. The number of the primary boundaries existing on the active channel region depends on a grain size and a tilt angle xe2x80x9cxcex8xe2x80x9d of a grain boundary and a dimension (i.e., length L and width W) of the active channel region, as illustrated in FIG. 1.
Assuming that the maximum number of the primary grain boundaries which can exist on the active channel region with a given channel length is xe2x80x9cNmaxxe2x80x9d, the number of the primary grain boundaries existing on an arbitrary active channel region with the same channel length can be either xe2x80x9cNmaxxe2x80x9d or xe2x80x9cNmaxxe2x88x921xe2x80x9d.
Referring to FIGS. 2A and 2B, the TFT of FIG. 2A has two primary boundaries, and the TFT of FIG. 2B has three primary boundaries.
In a display device, as the TFTs having the same number of primary boundaries become more dominant, the display device having an excellent TFT characteristic uniformity can be achieved. However, when the TFTs having Nmax primary-boundaries and the TFTs having xe2x80x9cNmaxxe2x88x921xe2x80x9d primary-boundaries are equal in number, the display device has a worst uniformity in TFT characteristics.
Meanwhile, the active channel region having large silicon grains can be formed using a sequential lateral solidification (SLS) technique. The TFT manufactured by employing such an active channel region shows similar characteristics to those of the TFT manufactured by using a single crystalline silicon.
However, a display device includes millions of pixels. A liquid crystal display (LCD) device includes one TFT per one pixel, and an organic electroluminescent (EL) display device includes at least two TFTs per one pixel. Therefore, it is impossible to manufacture millions of TFTs that are all equal in number of the primary grain boundaries existing on the active channel region and in the grain growth direction.
International Patent No. WO 97/45827 discloses a technique to form an active channel region having large silicon grains using the SLS technique. An amorphous silicon layer is deposited using a PECVD technique, an LPCVD technique, or a sputtering technique. Thereafter, the entire portion or a selected portion of the amorphous silicon layer is crystallized using the SLS technique, as illustrated in FIGS. 3A and 3B.
During a crystallization of the entire portion or a selected portion of the amorphous silicon layer, a laser beam or a stage can be stepped up or down, or shifted. Therefore, a misalignment between regions scanned by the laser beam occurs, resulting in a different number of primary grain boundaries in the active channel region from TFT to TFT. Although there is no misalignment error on the entire panel during crystallization, there would always be a different number of the primary boundaries from TFT to TFT depending on the position and dimension of TFTs on the panel unless the position and dimension of TFTs are designed to control the number and position of the primary grain boundaries, which complicates both the TFT design and the fabrication process. Thus, the number of primary grain boundaries included in the active channel region of the individual TFTs can differ from each other, leading to bad uniformity in TFT characteristics.
U.S. Pat. No. 6,177,301 discloses a method of manufacturing a TFT, wherein the active channel region of the TFT having large silicon grains is formed using the SLS technique. When a channel direction is parallel to a grain growth direction, as illustrated in FIG. 4A, a barrier effect of the grain boundary for a charge carrier direction is minimized, whereupon the TFT can have a characteristic similar to the single crystalline silicon. However, when a channel direction is perpendicular to a grain growth direction, as illustrated in FIG. 4B, the grain boundaries act as a trap of the charge carriers, whereupon a characteristic of the TFT greatly deteriorates.
Actually, the TFTs of which channel direction is perpendicular to a grain growth direction can be manufactured. In this case, a characteristic uniformity of the TFTs can be improved without greatly lowering the characteristics of the TFTs by tilting an angle of a channel direction to a grain growth direction by 30xc2x0 to 60xc2x0. However, this method cannot remove the primary boundaries completely from the active channel region, and thus the non-uniformity in the TFT characteristics due to the differing number of the primary grain boundaries still exists.
Accordingly, it is an object of the present invention to provide a poly-silicon layer which can provide thin film transistors having uniform characteristics.
It is another object of the present invention to provide a display device having uniform characteristics.
Additional objects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
The foregoing and other objects of the present invention are achieved by providing a poly-silicon layer of a thin film transistor (TFT) comprising an active channel region, wherein a probability P that a maximum number of a primary grain boundaries exist on the active channel region is not 0.5, the probability obtained by the following equation:       P    =                  D        -                              (                                          N                ⁢                                  xe2x80x83                                ⁢                max                            -              1                        )                    ·          Gs                    Gs        ,
where D=L cos xcex8+W sin xcex8, L is a channel length of the active channel region, W is a width of the active channel region, Nmax is the maximum number of the primary boundaries existing on the active channel region, Gs is a grain size, and xcex8 is a tilt angle of the primary grain boundary.
The foregoing and other objects of the present invention are also achieved by providing a poly-silicon layer of a thin film transistor (TFT) comprising an active channel region, wherein a length of the active channel region is an integer multiple of a grain size.
The foregoing and other objects of the present invention are also achieved by providing a poly-silicon layer of a thin film transistor (TFT) comprising an active channel region, wherein a probability that a maximum number of primary grain boundaries exists on the active channel region is defined as a ratio of the distance in which the length of the active channel in the longitudinal direction of grains minus a distance that a xe2x80x9cmaximum numberxe2x80x941xe2x80x9d of primary grain boundaries occupy, to the longitudinal length of the grains, and the probability is not 0.5.
The foregoing and other objects of the present invention are also achieved by providing a device having a thin film transistor having the poly-silicon layer of one of the poly-silicon layers of the present invention.